1. Field of the Invention
The present invention relates to an organic light emitting diode display device, and more particularly to an organic light emitting diode display device that compensates for a change in a device driving characteristic of the organic light emitting diode and for improving the reliability of the device.
2. Discussion of the Related Art
Recently, various flat panel display devices have been developed that have reduced weight and bulk that are capable of eliminating the disadvantages of a cathode ray tube (CRT). Such flat panel display devices include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP) and a light emitting diode (LED) display, etc.
The LED display device of such display devices employs an LED including a phosphorous material capable of emitting light by a re-combination of electrons with holes. The LED display device is generally classified into an inorganic LED display device using an inorganic compound as the phosphorous material and an organic LED (OLED) display device using an organic compound as the phosphorous material. Such an OLED display device has the advantages of a low voltage driving, a self-luminescence, a thin thickness, a wide viewing angle, a fast response speed, high contrast, etc.
The OLED usually includes of an electron injection layer, an electron transport layer, a light-emitting layer, a hole transport layer and a hole injection layer that are disposed between a cathode and an anode. In such an OLED, when a predetermined voltage is applied between the anode and the cathode, electrons produced from the cathode are moved, via the electron injection layer and the electron transport layer, into the light-emitting layer while holes produced from the anode are moved, via the hole injection layer and the hole transport layer, into the light-emitting layer. Thus, the electrons and the holes fed from the electron transport layer and the hole transport layer emit light due to their re-combination in the light-emitting layer.
As shown in FIG. 1, an active matrix type OLED display device employing the above-mentioned OLED includes an OLED panel 13 having n×m number of pixels P[i,j] arranged in a n×m matrix at pixel areas defined by the crossing of n number of scan lines G1 to Gn (n is a positive integer) and m number of data lines D1 to Dm (m is a positive integer); a scan drive circuit 12 for driving the scan lines G1 to Gn of the OLED panel 13; a data drive circuit 11 for driving the data lines D1 to Dm of the OLED panel 13; and m number of power voltage supply lines S1 to Sm arranged in parallel to the data lines D1 to Dm for supplying a high level power supply voltage VDD to each pixel P[i,j]. Herein, P[i,j] is a pixel positioned at an ith row and a jth column, and i is a positive integer smaller than or equal to n and j is a positive integer smaller than or equal to m.
The scan drive circuit 12 include a plurality of gate drive integrated circuits. Each of gate drive integrated circuits includes a shift register sequentially shifting a scan signal to output for each horizontal period; a level shifter converting an swing width of output signal of the shift register into a swing width which is suitable for driving a pixel drive device, i.e., thin film transistor TFT; and an output buffer connected between the level shifter and the scan lines G1 to Gn.
The scan drive circuit 12 sequentially supplies the scan signal to the scan lines G1 to Gn to select a horizontal line of the organic light emitting diode panel 13 to which the data are supplied.
The data drive circuit 11 converts the digital data voltage input from the outside into an analog data voltage. The data drive circuit 11 supplies the analog data voltage to the data lines D1 to Dm whenever the scan signal is supplied.
Each of the pixels P[i,j] receives a data voltage from the data lines D1 to Dm when the scan signal is applied to the scan lines G1 to Gn, and generates light corresponding to the data voltage.
Each pixel P[i,j] includes an OLED having an anode connected to the power voltage supply lines S1 to Sm, and an OLED drive circuit 15 that is connected to the scan lines G1 to Gn and the data lines D1 to Dm and to which a low level power supply voltage VSS is supplied.
The OLED drive circuit 15 includes a first transistor T1 for supplying a data voltage from the data lines D1 to Dm to a first node N1 in response to the scan signal from the scan lines G1 to Gn; a second transistor T2 for controlling a current amount flowing in the OLED in response to a voltage of the first node N1; and a storage capacitor Cs in which the voltage of the first node N1 is charged.
The drive waveform of the OLED drive circuit 15 is as shown in FIG. 2. In FIG. 2, ‘1F’ is one frame period, ‘1H’ is one horizontal period, ‘Vg_i’ is a gate voltage supplied from the ith scan line G1, ‘Pcs’ is a scan signal, ‘Vd_j’ is a data voltage supplied from the jth data line Dj, ‘VN1’ is a voltage of the first node N1, and ‘IOLED’ is a current which flows through the OLED.
Referring to FIGS. 1 and 2, the first transistor T1 is turned on when the scan signal is applied thereto through the scan lines G1 to Gn, thereby supplying a data voltage Vd from the data lines D1 to Dm to the first node N1. The data voltage Vd supplied to the first node N1 is charged in the storage capacitor Cs and is supplied to a gate electrode of the second transistor T2. If the second transistor T2 is turned on by the data voltage Vd supplied in this manner, then the current flows through the OLED. At this time, the current flowing through the OLED is generated by the high level power supply voltage VDD, and the amount of the current is in proportion to the magnitude of the data voltage applied to the second transistor T2. Further, even when the first transistor T1 is turned off, the second transistor T2 stays turned by a voltage on the storage capacitor Cs to thereby control the amount of the current flowing in the OLED until the data voltage Vd of the next frame is supplied thereto.
The OLED display device of the related art as in FIGS. 1 and 2 has the following problems.
First, a positive data voltage Vd is applied for a long time to the gate electrode of the second transistor T2 that drives the OLED. A gate bias stress is accumulated in the second transistor T2 by the positive data voltage Vd, as shown in FIG. 3, as time passes. The accumulated gate bias stress causes a threshold voltage Vth of the second transistor T2 to be shifted. Due to the deterioration of the second transistor T2, the OLED display device of the related art becomes unstable in driving, and its reliability drops as time passes. FIG. 4B represents the change of the transistor caused by a negative gate bias stress when a negative current is repeatedly applied to the gate electrode of the transistor over a long time period, and an arrow mark in FIGS. 4A and 4B represents a movement of the threshold voltage Vth of the transistor.
Secondly, the reliability of the scan operation of the OLED display device of the related art decreases because an undesired voltage is applied to the gate line due to a charge remaining in control nodes which control the output of the scan drive circuit 12. Especially, if a Q node for increasing a shift register output of the scan drive circuit 12 is charged with the remaining charge for a non-scan period, then the undesired voltage appears in the gate line, thus a leakage current is generated in the transistors T1, T2 and the reliability of the scan operation decreases.
Thirdly, in the OLED display device of the related art, the cost of the drive circuit, such as the scan drive circuit 12, is high, and the manufacturing cost is high because of a process that adheres the scan drive circuit 12 to the substrate where the pixel array is formed.